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FPGA-Based Traffic Light Controller

Finite state machine controller for a traffic signal, implemented on FPGA

A finite state machine-based traffic light controller designed in Verilog and implemented on an FPGA development board, with configurable timing sequences.

What's included

  • FSM-based signal sequencing logic
  • FPGA implementation with LED output demo
  • Configurable timing parameters
  • Simulation test bench included
  • Report with state diagrams

Tech stack

Verilog HDLFPGA (Basys/Nexys)Xilinx Vivado

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